Method for manufacturing a semiconductor device using a silicon nitride mask

ABSTRACT

An amorphous silicon film is formed on a glass substrate by a CVD method, and a mask is formed of a silicon nitride film. Then, nickel is selectively doped into the amorphous silicon film by spin-coating solution containing nickel onto the amorphous silicon film. Thereafter, the amorphous silicon film is crystallized by a thermal treatment.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an apparatus and a method formanufacturing semiconductor devices which use semiconductor materialhaving crystallinity.

2. Description of the Related Art

A thin film transistor (hereinafter referred to as "TFT") using thinfilm semiconductor material has been well known. The TFT is constructedby forming thin film semiconductor on a substrate and using the thinfilm semiconductor. The TFT has been used for various integratedcircuits, especially an electrooptical device, and particularly muchattention is paid to the TFT as a switching device which is provided toeach pixel of an active matrix type of liquid crystal display device, ora driver device formed in its peripheral circuits.

Amorphous silicon film is most easily used as thin film semiconductorfor the TFT, however, it has a problem that its electric characteristicsis not good. In order to improve the characteristics of the TFT, it is abetter way to use a silicon film having crystallinity as thin filmsemiconductor. The crystalline silicon film is known as polycrystalsilicon, polysilicon or microcrystal silicon or the like. In order toobtain this crystalline silicon, an amorphous silicon film is firstformed and then crystallized by heating.

However, the crystallization by heating requires a heating temperatureof 600° C. or more and a heating time above 10 hours, so that it isdifficult to use a glass substrate as a substrate. For example, a glassstrain temperature of Corning 7059 glass which is used for an activematrix type liquid crystal display device is equal to 593° C. Therefore,the heating temperature exceeding 600° C. causes some problem when alarge-scale substrate is required to be used.

SUMMARY OF THE INVENTION

In order to solve the above problems, the same inventors as thisapplication previously proposed a method of manufacturing semiconductordevices as disclosed in Japanese patent Application No. Hei-5-294633. Inthe method as disclosed in this patent application, a crystallinesilicon film was obtained by adding catalysts, especially nickel to anamorphous silicon film with solution and performing a heating treatmentat a low temperature and for a short time. The present invention hasbeen made to improve the apparatus and method of manufacturingsemiconductor devices according to the Japanese patent Application No.Hei-5-294633 which was previously proposed by the inventors of thisapplication, and through various studies on the above apparatus andmethod, the inventors of this application have proposed the followingtwo crystallizing methods. In one method, an area where crystal growthis made in a substantially perpendicular direction to the substrate in aregion which is directly doped with catalysts (hereinafter referred toas "longitudinal growth area") is used as a device-forming area. On theother hand, in the other method, catalysts are selectively added, and anarea where crystal growth is made in a substantially horizontaldirection to the substrate in a peripheral region of the catalysts-dopedregion (hereinafter referred to as "lateral growth area) is used as adevice-forming area.

Through various studies of these two crystallizing methods, it has beenconcluded that the latter method using the lateral crystal growthprocess is more preferable on the characteristics of completed devices,and the inventors have made a further consideration on thislateral-growth crystallizing method.

An object of the present invention is to improve the apparatus andmethod disclosed in the Japanese Patent Application No. Hei-5-294633,and it is to provide an apparatus and a method of manufacturing thinfilm semiconductor having crystallinity by a heating treatment at atemperature of 600° C. or less using catalysts, which has highercontrollability, larger process margin and higher productivity than theJapanese patent Application No. Hei-5-294633.

In order to attain above object, according to a first aspect of thepresent invention, a method of manufacturing a semiconductor device,comprises a step of forming a silicon oxide film and an amorphoussilicon film on a substrate having an insulating surface, a step ofperforming a heat treatment on the film-formed substrate sequentially tothe film-forming step without exposing the film-formed substrate toatmospheric air to thereby remove hydrogen, a step of forming a siliconnitride film on the hydrogen-removed substrate sequentially to thehydrogen-removing step, a step of patterning the silicon nitride film toselectively expose the amorphous silicon film, a step of doping metalelements so as to be contacted with the exposed amorphous silicon filmto promote crystal growth of the exposed amorphous silicon film, and astep of performing a heat treatment on the amorphous silicon film tocrystallize the amorphous silicon film in a direction parallel to thesubstrate from an area in which the metal elements are doped.

According to another aspect of the present invention, an apparatus formanufacturing semiconductor devices, comprises a first treatment chamberfor forming a silicon oxide film and an amorphous silicon film on asubstrate having an insulating surface, a second treatment chamber forperforming a heat treatment on the film-formed substrate to removehydrogen therefrom sequentially to the film-forming operation in thefirst treatment chamber without exposing the substrate to atmosphericair, a third treatment chamber for forming a silicon nitride film on thehydrogen-removed substrate sequentially to the hydrogen-removingoperation in the second treatment chamber, and a common chamber whichcommonly intercommunicates with the first treatment chamber, the secondtreatment chamber and the third treatment chamber, wherein the first,second and third treatment chambers are designed in a hermeticstructure, and the common chamber has means for feeding a substrate orsample.

According to another aspect of the present invention, a method ofmanufacturing semiconductor devices, comprises a step of forming asilicon oxide film and an amorphous silicon film on a substrate havingan insulating surface, a step of performing a heat treatment on thefilm-formed substrate sequentially to the film-forming step withoutexposing the film-formed substrate to atmospheric air to thereby removehydrogen, a step of forming a silicon nitride film on thehydrogen-removed substrate sequentially to the hydrogen-removing step, astep of patterning the silicon nitride film in the form of an activelayer to selectively expose the amorphous silicon film, a step of dopingmetal elements so as to be contacted with the exposed amorphous siliconfilm to promote crystal growth of the exposed amorphous silicon film, astep of performing a heat treatment on the amorphous silicon film tocrystallize the amorphous silicon film in a direction parallel to thesubstrate from an area in which the metal elements are doped, and a stepof patterning the crystallized silicon film using the silicon nitridefilm as a mask to form an active layer.

According to another aspect of the present invention, a method ofmanufacturing semiconductor devices, comprises a step of forming asilicon nitride film as a mask to form an active layer on an amorphoussilicon film which is formed on a substrate having an insulatingsurface, a step of doping metal elements using the silicon nitride filmas a mask to promote crystal growth of the amorphous silicon film, astep of performing a heat treatment to crystallize the amorphous siliconfilm, and a step of forming an active layer using the silicon nitridefilm as a mask.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A to 1C are diagrams showing a series of processes ofmanufacturing a semiconductor device of an embodiment according to thepresent invention;

FIG. 2 shows an apparatus of manufacturing a semiconductor device;

FIG. 3 shows the apparatus of manufacturing a semiconductor device;

FIGS. 4A to 4F are diagrams showing a series of processes ofmanufacturing a semiconductor device;

FIGS. 5A to 5D are diagrams showing a series of processes ofmanufacturing a semiconductor device; and

FIG. 6 shows a semiconductor device which is manufactured according tothe present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Preferred embodiments according to the present invention will bedescribed hereunder with reference to the accompanying drawings.

Before describing preferred embodiments according to the presentinvention, the lateral-growth crystallizing method as disclosed in theJapanese Patent Application No. Hei-5-294633 will be briefly describedwith reference to FIGS. 1A to 1C.

First, an undercoat film of silicon oxide is formed on a glass substratesuch as a Corning 7059 substrate or the like, and an amorphous siliconfilm 12 is formed at a thickness of 100 to 5000 Å, preferably from 500to 800 Å on the substrate 11 by a plasma CVD treatment or apressure-reduced heating CVD treatment.

Subsequently, a mask material film 21 which is typically formed ofsilicon oxide film is formed on the amorphous silicon film 12, and anopening portion through which nickel will be added is formed in the maskmaterial 21 so that the amorphous silicon film below the mask material21 is exposed to the opening portion. Thereafter, the surface of theamorphous silicon film which is exposed to the opening portion isoxidized thinly if occasion demands (it is represented by referencenumeral 20 in FIG. 1), and nickel is doped into the amorphous siliconfilm with solution 14 containing nickel.

The substrate which has been doped with nickel by the method asdescribed above is subjected to a heat treatment at 450° to 600° C.,typically at about 550° C. under an atmosphere of inert gas such as N₂or the like or under an oxidizing atmosphere to form a crystallinesilicon film 25 whose crystal growth is made in a lateral direction.

An attempt was made to change the mask material from the silicon oxidefilm to a silicon nitride film for a series of processes as describedabove, and it was experimentally proved that a long-term heat treatmentcaused nickel to pass through the silicon oxide film and reach theamorphous silicon film when the silicon oxide film was used as the maskmaterial. This induces a phenomenon of longitudinal growth of passednickel occurs, and thus it was observed that the lateral growth wasdisturbed by the longitudinal growth. On the other hand, the abovephenomenon was not observed when the silicon nitride film is used as themask material. However, in this case, it was also observed that thelateral growth degree was somewhat smaller as compared with the siliconoxide mask. As a result of an additional experiment, it was found outthat the reduction in the lateral growth degree can be avoided byremoving hydrogen in advance. That is, it is required as a pre-treatmentfor crystallization to remove hydrogen from the amorphous silicon film.However, when the silicon nitride film is used, it is difficult toremove hydrogen from the amorphous silicon film.

Next, a comparison experiment was made for the following two cases, acase where the undercoat film, the amorphous silicon film and the maskmaterial film were sequentially (continuously) formed on the substratewithout being exposed to the atmospheric air (hereinafter referred to as"sequential film-forming process") and a case where these films wereseparately formed on the substrate with being exposed to the atmosphericair (hereinafter referred to as "separate film-forming process").Through this comparison experiment, it was proved that the lateralgrowth distance was longer and the crystallinity was higher in thesequential film forming process than the separate film forming processeven though the same film quality was set in both the cases. This factwould mean that the lateral growth process that crystal growth is madein a substantially parallel direction to the substrate is stronglyaffected by the condition of the interface.

Accordingly, on the basis of the series of experiments as describedabove, the following crystal growth method using the lateral crystalgrowth having high reproducibility and high controllability includes; astep of continuously (sequentially) forming a silicon oxide film and anamorphous silicon film on a glass substrate, a step of performing a heattreatment on the film-formed substrate sequentially to the film-formingstep without being exposed to atmospheric air to remove hydrogen fromthe substrate, a step of forming a silicon nitride film on thehydrogen-removed substrate sequentially to the hydrogen-removing step, astep of subjecting the substrate having the silicon oxide film, theamorphous silicon film and the silicon nitride film formed thereon to apatterning treatment and an etching treatment of the silicon nitridefilm to partially expose the amorphous silicon film, a step of coatingthe substrate with solution containing nickel to doped nickel into theselectively exposed amorphous silicon film, and a step of performing aheat treatment on the nickel-coated substrate to crystallize theamorphous silicon film.

In order to achieve a series of processes as described above, anapparatus in which a silicon oxide film, an amorphous silicon film and asilicon nitride film can be formed in succession and a heat treatment(hydrogen removing process) can be performed without exposing thesefilms to atmospheric air even only once is required as a multipurposesubstrate treatment device.

Specifically, the multipurpose substrate treatment includes pluralpressure-reducible treatment chambers, and a common pressure-reduciblechamber through which the plural treatment chambers intercommunicatewith one another, and which has substrate feeding means for feeding thesubstrate between the common chamber and each treatment chamber, whereinat least one of the treatment chambers is capable of forming a siliconoxide film using a plasma CVD method, at least one of the treatmentchambers is capable of forming silicon nitride film using a plasma CVDmethod, at least one of the treatment chambers is capable of forming anamorphous silicon film using a plasma CVD method, and at least one ofthe treatment chambers is capable of performing a heat treatment at 400°C. or more on plural substrates at the same time.

The apparatus thus constructed is shown in FIGS. 2 and 3.

The apparatus shown in FIG. 2 can be used for multipurpose, and it canbe constructed by combining the desired number of treatment chamberswhich are used to perform desired film forming processes and annealingprocesses. As the substrate to be treated in the apparatus shown in FIG.2 may be used a glass substrate, a silicon substrate, an insulatingsubstrate, a semiconductor substrate or the like. Namely, any substratemay be used insofar as it has an insulating surface. For example, aglass substrate which is inexpensive is generally used for anelectrooptical device such as an active matrix type liquid crystaldisplay device, an image sensor or the like.

For example, in the case of FIG. 2, the apparatus may be constructed asfollows. That is, a chamber 301 is used as a substrate carry chamberwhich corresponds to the common chamber, chambers 306 and 307 oftreatment chambers in which various kinds of treatments are performedare used as spare chambers, one of which is used for feed-in of thesubstrate and the other of which is used for feed-out of the substrate,a chamber 302 is used as a plasma CVD apparatus for forming aninsulation film, a chamber 303 is used as a plasma CVD apparatus forforming an amorphous silicon film, a chamber 304 is used as a plasma CVDapparatus for forming a silicon nitride film, and a chamber 305 is usedas a heat treatment furnace to remove hydrogen. In the apparatus thusconstructed, only the heat treatment process needs a long treatment timeof several hours and it becomes the main factor of reducing the totalthroughput of this process. Therefore, it is important to construct theapparatus so that plural substrates 322 are simultaneously heated by aheater 310, carried to a substrate feeding position by a stage 315 ifnecessary, and then carried to a next process while fed by a robot arm314. Here, the spare chambers may be also called as treatment chambersin the meaning that these chambers have functions of feeding in and outthe substrate. The respective treatment chambers are partitioned fromone another by gate valves 308-313, and they can be independently andindividually decompressed by vacuum pumps 319-321 respectively, so thatgas occurring at a treatment time can be prevented from contaminatinginto another treatment chamber. The substrates 322 are carried by therobot arm 314, and the throughput can be improved by the multitask.

Any combination like the combination shown in FIG. 2 can be freelyperformed. As the elements to be combined may be used plasma CVD,pressure-reduced heat CVD (hereinafter referred to as "LPCVD"), photoCVD, microwave CVD, heating furnace, anneal furnace by lightirradiation, sputtering, plasma anneal, plasma etching (isotropic oranisotropic). In order to construct the apparatus of the presentinvention, at least the elements as described above are required.

In the present invention, the most remarkable effect can be obtainedwhen nickel is used as catalyst. Another material usable as catalyst maybe preferably used one or several kinds of elements selected from Ni,Pd, Pt, Cu, Ag, Au, In, Sn, Pd, Sn, Pd, P, As, Sb.

Next, preferred embodiments according to the present invention will bedescribed.

(Embodiment 1)

In this embodiment, a silicon nitride film of 500 Å is selectivelyformed and nickel is selectively doped using this silicon nitride filmas a mask.

A series of processes in the manufacturing method of this embodimentwill be briefly described with reference to FIG. 1.

First, a silicon oxide film of 2000 Å and an amorphous silicon film 12of 100-1500 Å are sequentially formed on a glass substrate (Corning7059, 10 cm square) by the plasma CVD method using the apparatus shownin FIGS. 2 and 3. In this case, the amorphous silicon film 12 is formedat a thickness of 1000 Å. A film forming condition of the silicon oxidefilm is as follows: film forming pressure of 0.1-1 torr (0.3 torr inthis embodiment), the ratio of TEOS:O₂ is set to 1:10, RF power of 1-500W (300 W in this embodiment) and a substrate temperature of 100°-500° C.(400° C. in this embodiment). A film forming condition of the amorphoussilicon film is as follows: film forming pressure of 0.1-1 torr (0.3torr in this embodiment), film forming gas of monosilane, RF power of1-100 W (35 W in this embodiment) and a substrate temperature of100°-300° C. (160° C. in this embodiment). (FIG. 1(A))

Subsequently, the substrate is fed to the heat treatment chamber 305without exposing the substrate to atmospheric air, and a heat treatmentat 350°-550° C., 400° C. in this case, for one hour under N₂ atmosphereis performed on the substrate to remove hydrogen from the amorphoussilicon film 12 which is formed by the plasma CVD method.

Thereafter, the substrate 322 is fed to the treatment chamber 304without exposing the substrate to the atmospheric air, and a siliconnitride film 21 serving as a mask is formed at a thickness of 200 Å ormore, at 500 Å in this case. A film forming condition is as follows:film forming pressure of 0.1-1 torr (0.3 torr in this embodiment), theratio of monosilane:ammonia=1:4, RF power of 100-500 W (300 W in thisembodiment) and the substrate temperature of 200°-500° C. (400° C. inthis embodiment). On the basis of the experiments which had beenperformed by the inventors of this application, it was confirmed that noproblem occurred even when the silicon nitride film 21 was equal to 100Å, and thus it is expected that the thickness of the silicon nitride maybe smaller if film quality is fine.

Thereafter, the silicon nitride film 21 is patterned in a desiredpattern by an ordinary photolitho-patterning process, and a thin siliconoxide film 20 is formed by irradiation of uv rays under an oxygenatmosphere. The formation of the silicon oxide film 20 is performed byirradiation of uv rays for 5 minutes under the oxygen atmosphere. Thethickness of the silicon oxide film 20 is guessed to be about 20-50 Å(FIG. 1A). With respect to the silicon oxide film to improvewettability, an adequate doping can be performed with only hydrophilicproperty of the silicon oxide film when the solution and the patternsize are matched to each other. However, such a case is very rare, andit is generally safety to use the silicon oxide film 20.

In this condition, 5 ml of acetate solution containing 100 ppm nickel isdropped (in case of 10 cm square substrate). At this time, the solutioncan be prevented from leaking to the back surface of the substrate bycoating the substrate with solution while rotating a spinner at 150 rpm.After keeping the substrate in the above state for 5 minutes, a spin dryis performed at 2000 rpm for 60 sec spinning (FIG. 1(B)).

Thereafter, a heat treatment is performed for 8 hours at 550° C.(nitrogen atmosphere) to crystallize the amorphous silicon film 12. Atthis time, the crystal growth is made in a lateral (horizontal)direction by about 40 μm from a nickel-doped region 22 to anickel-undoped region as indicated by an arrow 23. In FIG. 1(C),reference numeral 24 represents the region in which nickel was directlydoped and thus crystallization occurred, and reference numeral 25represents the region in which the lateral crystallization occurred. Itwas confirmed that the crystal growth was made substantially along <111>axis in the region 25.

In this embodiment, the nickel concentration in the nickel-doped regionwhere nickel was directly doped can be controlled to be in the rangefrom 1×10¹⁶ atoms cm⁻³ to 1×10¹⁹ atoms cm⁻³ by changing the solutionconcentration and the keeping time. Likewise, the concentration in thelateral growth region can be also controlled to be below the aboverange.

It is necessary to exfoliate the mask material if a device is afterwardsformed on the substrate thus formed. In this case, when the siliconoxide mask is used like the prior art, the glass substrate and theundercoat silicon oxide would be greatly damaged because hydrofluoricacid etchant or a dry etching with fluoride gas must be used. On theother hand, when the silicon nitride mask is used, heated phosphoricacid can be used as an etchant, and it little damages the crystallinesilicon film, the silicon oxide film and the glass substrate.

As described above, the concentration of the catalysts is small and thedegree of crystallization is excellent in the region where the lateralcrystal growth is made, and thus it is useful to utilize this region asan active region for a semiconductor device. For example, it isremarkably effective to use this region as a channel-forming region fora thin film transistor.

EMBODIMENT 2!

In this embodiment, an electronic device is formed using a region whichwas selectively doped with nickel in the same manner as the embodiment 1and in which the crystal growth was performed in a lateral direction (adirection parallel to the substrate) from a nickel-doped area. When sucha construction is adopted, the nickel concentration can be reduced to alower level, and thus this construction is remarkably preferable in viewof electric stability and reliability of the device.

This embodiment relates to a process of manufacturing TFTs which areused to control active matrix pixels. FIG. 4 shows a series ofmanufacturing processes of this embodiment. First, a substrate 201 iscleaned, and then an undercoat film 202 of silicon oxide is formed at athickness of 2000 Å by a plasma CVD method using TEOS(tetraethoxysilane) and oxygen as source gas in the multipurposesubstrate treatment apparatus shown in FIGS. 2 and 3. Sequentially tothe above process, an intrinsic (type I) amorphous silicon film 203 of500-1500 Å in thickness, for example 1000 Å, is formed by the plasma CVDmethod. Thereafter, a heat treatment at 450° C. for one hour isperformed using a heat treatment furnace 305 to remove hydrogen. Afterthat, an silicon nitride film 205 of 500-2000 Å thickness, for example1000 Å, is sequentially formed in the same apparatus by the plasma CVDmethod. Subsequently, the silicon nitride film 205 is selectively etchedto form a region 205 in which amorphous silicon is exposed. If thepatterning treatment of this region 205 is performed so that the siliconnitride film remains on a region in which islands will be afterwardsformed, it is very useful in the process because the patterningtreatment of the amorphous silicon film can be performed using thesilicon nitride film as a mask after the crystallizing process.

Thereafter, solution (acetate solution in this embodiment) containingnickel which is catalyst prompting crystallization is coated on thesubstrate according to the method as described in the embodiment 1. Thenickel concentration in the acetate solution is set to 100 ppm. Theother processes and conditions are the same as those of the embodiment1.

Thereafter, a heat annealing treatment at 500°-620° C., for example, at550° C. under nitrogen atmosphere is performed for four hours tocrystallize a silicon film 303. The crystallization starts from an areawhere nickel and silicon film are contacted with each other, andprogresses in parallel to the substrate as shown by an arrow. In FIGS.4A to 4F, the region 204 represents a portion where nickel was directlydoped and crystallized, and the region 203 represents a portion wherethe crystallization progressed in the lateral direction. It is confirmedthat the crystallization in the lateral direction as represented byreference numeral 203 is extended by about 25 microns, and the directionof the crystal growth is substantially in parallel to the direction of<111> axis. (FIG. 4A).

Subsequently, the crystalline silicon film 204 is subjected to the dryetching treatment to form islands using the silicon nitride film 205 asa mask. Through this process, an etch-off treatment can be performed onthe directly-doped region 206 having high nickel concentration. As aresult, in this embodiment, the region having high nickel concentrationwas designed not to be overlapped with a channel-forming region in anactive layer 208. Thereafter, the silicon nitride film 208 is etchedwith heated phosphoric acid to form the islandish active layer region208.

Subsequently, the active layer (silicon film) 208 is left under anatmosphere of 10 atms containing 100 vol. % water vapor at 500°-600° C.,typically 550° C. to oxidize the surface of the active layer and form asilicon oxide film 209. The thickness of the silicon oxide film is setto 1000 Å. After the silicon oxide film 209 is formed by the heatoxidization, the substrate is kept at 400° C. temperature under anammonia atmosphere (1 atm, 100%). In this state, infrared rays having apeak in the range 0.6-4 μm, for example 0.8-1.4 μm is irradiated to thesubstrate for 30-180 seconds, and a nitridation treatment is performedon the silicon oxide film 209. In this case, 0.1-10% HCl may be mixedinto the atmosphere.

A halogen lamp is used as the infrared ray source. The intensity of theinfrared ray is controlled so that the temperature on a single crystalsilicon wafer which is used as a monitor is in the range of 900°-1200°C. Specifically, the temperature of a thermo couple which is buried inthe silicon wafer is monitored, and fed back to the infrared ray source.In this embodiment, a temperature increasing (heating) rate is set to beconstant, 50°-200° C./sec, and a temperature decreasing (cooling) rateis set to be a naturally cooling rate, 20°-100° C./sec. The silicon filmis selectively heated by the infrared ray irradiation, so that it cansuppress the heating of the glass substrate to the minimum. (FIG. 4B).

Subsequently, an aluminum (containing 0.01-0.2% of scandium) film of3000-8000 Å in thickness, for example 6000 Å, is formed by a sputteringmethod. The aluminum film is subjected to the patterning treatment toform a gate electrode 210 (FIG. 2C).

Subsequently, an oxide layer 211 is formed on the surface of thealuminum electrode by performing anodic oxidization on the surface. Theanodic oxidization is performed in ethylene glycol solution containing1-5% of tartaric acid. The thickness of the oxide layer 211 is equal to2000 Å. The thickness of the oxide layer 211 corresponds to an offsetgate region which will be formed in a subsequent ion-doping process, andthus the length of the offset gate region can be determined in the aboveanodic oxidation process (FIG. 4D).

Subsequently, impurities (in this case, phosphorus) which can provideN-type conductivity is doped in self-alignment into an active region(constructing source/drain and channel regions) using a gate electrodeportion, that is, a gate electrode 210 and its peripheral oxide layer211 as a mask by an ion-doping method (called as a plasma dopingmethod). Phosphine (PH₃) is used as doping gas, and an accelerationvoltage is set to 60-90 kV, for example 80 kV. A dose amount is set to1×10¹⁵ -8×10¹⁵ cm⁻², for example 4×10¹⁵ cm⁻². As a result, N-typeimpurity regions 212 and 213 can be formed. As is apparent from thefigures, the impurity region and the gate electrode are kept in such anoffset state as to be away from each other at a distance x. The offsetstate like this is particularly effective to reduce a leak current(called as "off current") occurring when a reverse voltage (minusvoltage for N channel TFT) is applied to the gate electrode. Especially,it is effective to provide the offset because the leak current isdesired to be low so that no charges stored in pixel electrodes leak toobtain a good image in the case of TFTs which control active matrixpixels like this embodiment.

Thereafter, an anneal process is performed by laser irradiation. A KrFexcimer laser (wavelength 248 nm, pulse width 20 nsec) is utilized as alaser light source, but another type of laser may be used. The conditionof laser irradiation is as follows: the energy density of irradiatedlaser is 200-400 mJ/cm², for example 250 mJ/cm², and irradiation isrepeated at 2-10 times, for example 2 times every irradiation targetpoint. In this case, the effect could be enhanced if the substrate isheated at 200°-450° C. during the laser irradiation process (FIG. 4E).

Subsequently, a silicon oxide film 214 of 6000 Å thickness is formed asa layer insulator by the plasma CVD method. Further, a transparentpolyimide film 215 is formed by a spin coating method, and the surfacethereof is flattened. A transparent electroconductive film (ITO film) of800 Å thickness is formed on the surface of the polyimide film thusformed by a sputtering method, and then patterned to form a pixelelectrode 216.

Thereafter, contact holes are formed in layer insulators 214, 215, andelectrodes/wires 217 and 218 of the TFTs are formed of metal material,for example, a multilayer film of titanium nitride and aluminum.Finally, an anneal treatment is performed at 350° C. for 30 minutesunder a hydrogen atmosphere of 1 atom to complete an active matrix pixelcircuit having the TFTs (FIG. 4F).

EMBODIMENT 3!

FIGS. 5A to 5D are cross-sectional views showing a series ofmanufacturing processes in a third embodiment of the present invention.First, an undercoat film 102 of silicon oxide is formed at a thicknessof 2000 Å on a glass substrate (Corning 7059) 501 by the sputteringmethod. In a case where the substrate is annealed at a temperaturehigher than the distortion temperature and then gradually cooled to atemperature below the distortion temperature at 0.1°-1.0° C./minutebefore or after the undercoat film is formed, a mask alignment work canbe facilitated because contraction of the substrate can be suppressed ina subsequent process containing a temperature increasing step(containing a thermal oxidization process and subsequent thermal annealprocess of this invention). For the Corning 7059 substrate, it ispreferable to anneal the substrate at 620°-660° C. for 1-4 hours, thengradually cool the substrate at 0.03°-1.0° C./min, preferably 0.1°-0.3°C./min and then take out the substrate at a time when the temperature isreduced to 400°-500° C.

Subsequently, a silicon oxide film, an amorphous silicon film and asilicon nitride film are sequentially formed by the plasma CVD method inthe same manner as the embodiment 2. Thereafter, the amorphous siliconfilm is crystallized by the same method as the embodiment 2, and thenthe annealing treatment is performed under a nitrogen atmosphere (1 atm)at 600° C. for 48 hours to crystallize the silicon film. Thereafter, thesilicon film is subjected to the patterning treatment into 10°-1000 μmsquare parts to form islandish silicon films (active layers of TFTs) 503(FIG. 5A).

Subsequently, an oxygen atmosphere of 1 atm, 500°-750° C., typically600° C. containing 70-90% of water vapor was formed by a pyrogeneticreaction method at hydrogen/oxygen ratio of 1.5-1.9. The substrate iskept in this atmosphere for 3 to 5 hours to oxidize the surface of thesilicon surface and form a silicon oxide film 504 of 500-1500 Å, forexample, 1000 Å in thickness. it should be noted that the thickness ofthe surface of the initial silicon film is reduced by 50 Å or more bythe oxidization, so that contamination on the uppermost surface of thesilicon film does not extend to the silicon-silicon oxide interface,that is, clean silicon-silicon oxide interface can be obtained. Thethickness of the silicon oxide film is set to be twice as large as thatof the silicon film to be oxidized, and thus the thickness of theresidual silicon film is 500 Å when the silicon film of 1000 Å isoxidized to form the silicon oxide film of 1000 Å.

Generally, the thinner the silicon oxide film (gate insulating film) andthe active layer are, the more excellent the characteristics are, forexample, mobility becomes larger and off-current reduces. On the otherhand, as the initial amorphous silicon film is thicker, thecrystallization of the amorphous silicon film is more facilitated.Accordingly, there have been conventionally some conflict betweencharacteristics and easiness of the process with respect to thethickness of the active layer. The invention gives the first solution tothe conflict. Namely, a high-quality crystalline silicon film isobtained by forming a thicker amorphous silicon film beforecrystallization, and then the silicon film is oxidized to thin thesilicon film, whereby the characteristics of the TFT is improved. Inaddition, in the thermal oxidation process, amorphous portions andcrystal grain boundaries where recombination centers tend to exist areeasily oxidized, so that the number of recombination centers in theactive layer can be reduced. Therefore, the yield for products can beimproved.

After the silicon oxide film 504 is formed by the thermal oxidation, thesubstrate is annealed at 600° C. for 2 hours under dinitrogen monoxideatmosphere (1 atm, 100%) (FIG. 5B).

Sequentially, polycrystal silicon (containing 0.01-0.2% of phosphorus)of 3000-8000 Å thickness, 6000 Å for example, is formed by a lowpressure CVD method. A gate electrode 505 is formed by patterning thesilicon film. Subsequently, impurities (phosphorus in this case) whichprovide N-type conductivity are doped in self-alignment into an activeregion (constructing source/drain and channel regions) using the siliconfilm as a mask by the ion-doping method (called as "plasma dopingmethod"). Phosphine (PH₃) is used as doping gas and an accelerationvoltage is set to 60-90 kV, 80 kV for example. A dose amount is set to1×10¹⁵ -8×10¹⁵ cm⁻², 5×10¹⁵ cm⁻² for example. Through this process,N-type impurity regions 506 and 507 are formed.

Thereafter, an anneal process is performed by laser irradiation. A KrFexcimer laser (wavelength 248 nm, pulse width 20 nsec) is utilized as alaser light source, however, another type of laser may be used. Thecondition of laser irradiation is as follows: the energy density ofirradiated laser is 200-400 mJ/cm², for example 250 mJ/cm², andirradiation is repeated at 2-10 times, for example 2 times everyirradiation point. The enhancement of the effect can be performed if thesubstrate is heated at 200°-450° C. during the irradiation process (FIG.5C).

This process may be performed using a Lamp anneal method using nearinfrared ray. The near infrared ray is more liable to be absorbed bycrystallized silicon than amorphous silicon, and thus an effectiveannealing treatment which is equivalent to the thermal anneal of 1000°C. or more can be performed. On the other hand, the near infrared raysare hard to be adsorbed by the glass substrate (far infrared rays areabsorbed by the glass substrate but visible light and near infrared rays(wavelength 0.5-4 μm) are hard to be absorbed by the glass substrate),it is unnecessary to heat the glass substrate to a high temperature anda process time is very short. Accordingly, this is the best method in aprocess which induces a contraction problem of a glass substrate.

Subsequently, a silicon oxide film 508 of 6000 Å is formed as a layerinsulator by the plasma CVD method. Polyimide may be used as the layerinsulator. Thereafter, contact holes are formed, and then electrode/wire509 and 510 of a TFT are formed of metal material, for example amultilayer film of titanium nitride and aluminum. Finally, the annealtreatment is performed at 350° C. for 30 minutes under 1 atm hydrogenatmosphere to complete the TFT (FIG. 5D).

The mobility and S-value of the TFT obtained by the method as describedabove is measured to be 110-150 cm² /Vs and 0.2-0.5 V/digit,respectively. Further, when P-channel type TFT in which boron is dopedinto a source/drain region in the same method is formed, the mobility of90-120 cm² /Vs and S-value of 0.4 to 0.6 V/digit are obtained. Thismobility value is higher by 20% or more and this S-value is lower by 20%as compared with those of a case where a gate insulating film is formedby a well-known PVD method or CVD method.

The TFT which is obtained according to the method of this embodiment hasequivalent or more excellent reliability as compared with the TFT whichis produced by the high temperature thermal oxidization of 1000° C.

EMBODIMENT 4!

In the embodiment 4, the present invention is applied to an activematrix type liquid crystal display device. FIG. 6 is an plan viewshowing the outline of one substrate of the active matrix type liquidcrystal display device.

In FIG. 6, reference numeral 61 represents a glass substrate andreference numeral 63 represents a pixel area in which pixels of severalhundreds X several hundreds are arranged in a matrix form. Each of thesepixels is provided with a TFT as a switching element. Driver TFTs fordriving the TFTs in the pixel area are provided in peripheral driverareas 62. The pixel area 63 and the driver area 62 are integrally formedinto one body on the same substrate 61.

The TFTs placed in the driver regions 62 require a high mobilitycharacteristic because large current are required to flow through theseTFTs. On the other hand, the TFTs placed in the pixel region 63 requiresa small off-current (leak current) characteristic because they must keepcharges at the pixel electrodes fixedly. For example, TFTs which areproduced by a simple laser crystallization method using no nickel can beused as the TFTs placed in the pixel region 63. In this case, the laseranneal is performed with the same energy as the crystallization of thenickel-doped peripheral region. A crystalline silicon film which iscrystallized with low energy without nickel as described above has alower mobility due to low crystallinity as compared to a crystallinesilicon film produced with use of nickel. However, it has an advantagethat the off-current is low as a whole, and thus no problem occurs evenwhen it is used for pixels.

What is claimed is:
 1. A method of manufacturing a semiconductor devicecomprising the steps of:forming a silicon oxide film and an amorphoussilicon film on a substrate having an insulating surface; performing aheat treatment on the substrate sequentially to said silicon oxide filmforming step without exposing the substrate to atmospheric air tothereby remove hydrogen from the amorphous silicon film; forming asilicon nitride film on the amorphous silicon film sequentially to saidhydrogen-removing step; patterning the silicon nitride film toselectively expose the amorphous silicon film; doping a metal element soas to be contacted with the exposed amorphous silicon film to promotecrystal growth of the amorphous silicon film; and performing a heattreatment on the amorphous silicon film to crystallize the amorphoussilicon film in a direction parallel to the substrate from an area inwhich the metal element is doped.
 2. The method of claim 1 wherein theheat treatment performed to crystallize the amorphous silicon film isperformed at a temperature of 450° to 600° C.
 3. The method of claim 1wherein the heat treatment performed to remove the hydrogen from theamorphous silicon film is performed at a temperature of 350° to 550° C.4. The method of claim 1 wherein the silicon nitride film is formed at athickness of 200 Å or more.
 5. The method of claim 1 further comprisingthe step of removing the patterned silicon nitride film from on theamorphous silicon film by heated phosphoric acid after the heattreatment performed to crystallize the amorphous silicon film.
 6. Themethod of claim 1 wherein the crystallized silicon film is used in athin film transistor for an active matrix type electro-optical device.7. The method of claim 6 wherein the substrate comprises a glass.
 8. Themethod of claim 1 wherein the metal element doping step is carried outby applying a solution containing the metal element therein over theexposed amorphous silicon film.
 9. The method of claim 1 wherein themetal element is selected from the group consisting of Ni, Pd, Pt, Cu,Ag, Au, In, Sn, P, As and Sb.
 10. A method of manufacturing asemiconductor device comprising the steps of:forming a silicon oxidefilm and an amorphous silicon film on a substrate having an insulatingsurface; performing a heat treatment on the substrate sequentially tosaid silicon oxide film forming step without exposing the substrate toatmospheric air to thereby remove hydrogen from the amorphous siliconfilm; forming a silicon nitride film on the substrate sequentially tosaid hydrogen-removing step; patterning the silicon nitride film in theform of an active layer to selectively expose the amorphous siliconfilm; doping a metal element so as to be contacted with the exposedamorphous silicon film to promote crystal growth of the amorphoussilicon film; performing a heat treatment on the amorphous silicon filmto crystallize the amorphous silicon film in a direction parallel to thesubstrate from an area in which the metal element is doped; andpatterning the crystallized silicon film using the patterned siliconnitride film as a mask to form an active layer.
 11. The method of claim10 wherein the heat treatment performed to crystallize the amorphoussilicon film is performed at a temperature of 450° to 600° C.
 12. Themethod of claim 10 wherein the heat treatment performed to remove thehydrogen from the amorphous silicon film is performed at a temperatureof 350° to 550° C.
 13. The method of claim 10 wherein the siliconnitride film is formed at a thickness of 200 Å or more.
 14. The methodof claim 10 wherein the active layer is used in a thin film transistorfor an active matrix type electro-optical device.
 15. The method ofclaim 14 wherein the substrate comprises a glass.
 16. The method ofclaim 10 wherein the metal element doping step is carried out byapplying a solution containing the metal element therein over theexposed amorphous silicon film.
 17. The method of claim 10 wherein themetal element is selected from the group consisting of Ni, Pd, Pt, Cu,Ag, Au, In, Sn, P, As and Sb.
 18. A method of manufacturing asemiconductor device comprising the steps of:forming a silicon nitridefilm on an amorphous silicon film which is formed on a substrate havingan insulating surface; doping a metal element using the silicon nitridefilm as a mask to promote crystal growth of the amorphous silicon film;performing a heat treatment to crystallize the amorphous silicon film;and forming an active layer using the silicon nitride film as a mask.19. The method of claim 18 wherein the metal element is selected fromthe group consisting of Ni, Pd, Pt, Cu, Ag, Au, In, Sn, P, As and Sb.